Contribuição a minimização e simulação de circuitos logicos

AUTOR(ES)

Alexandre Cesar Rodrigues da Silva

DATA DE PUBLICAÇÃO

1989

RESUMO

This work deals with some aspects related to synthesis, analysis and simplification of logic circuits. The boolean algebra is introduced through basic axioms, as well as the dalgorithm for fault detection studying logical circuits. For the minimization of boolean functions a procedure that yields a quasi-minimum cover to the functions is presented. It is based on algorithms originally developped for failure diagnosis, as a indispensable mathematical tool for Comparisons are made with an algebraic procedure based on the Quine-McCluskey method and an improved version of Caruso s method. Numerical studies have shown that the presented method performs better than the ones cited above with regard to workspace requirements. The sequential machines are presented along with a reduction and a program that realizes the logic circuits procedure for state from their Mealy s state diagrams. An improved version of the LOGICO program is presented and used in some cases of practical circuits

ASSUNTO(S)

circuitos logicos

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