Mos Devices
Mostrando 1-12 de 29 artigos, teses e dissertações.
-
1. Analysis of Total Ionizing Dose Effects on 0.13 µm Technology-Temperature-Compensated Voltage References
ABSTRACT: The purpose of this work is to briefly discuss the effects of the total ionizing dose (TID) on MOS devices in order to estimate the results of future irradiation tests on temperature-compensated voltage references that are implemented on a mixed-signal chip fabricated using IBM 0.13 µm technology. The analysis will mainly focus on the effects of t
J. Aerosp. Technol. Manag.. Publicado em: 2013-09
-
2. Desenvolvimento de processos de eletrodos de porta (TaN e TiN) para dispositivos MOS / Process development of gate electrodes (TiN and TaN) for MOS devices
Tantalum nitride (TaN) and titanium nitride (TiN) films have been obtained by DC sputtering, using different nitrogen flow (10 - 80 sccm) and power (500 - 1500 W), in a nitrogen (N2)/argon (Ar) ambient on Si (100) substrates. The N2/Ar ratio in gas mixture and power effects on structural and electrical properties of TaN and TiN films were investigated by sca
IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia. Publicado em: 01/07/2011
-
3. A modified lightly doped drain structure for vlsi mosfet's
A new n-MOS LDD-like device structure (the J-MOS transistor) is proposed. It’s design, simulation, and fabrication are studied in this paper. n-channel MOSFET’s with Le, below 2µm suffer from high-field effects that must be overcome to secure reliable 5-V operation. LDD structures alleviate these effects, but their reliability is better than that of con
Publicado em: 2011
-
4. Statistical model for the circuit bandwidth dependence of low-frequency noise in deep-submicrometer MOSFETs
This paper covers measurement, analytical analysis, and Monte Carlo simulation of the frequency and bandwidth dependence of MOSFET low-frequency (LF) noise behavior. The model is based on microscopic device physics parameters, which cause statistical variation in the LF noise behavior of individual devices. Analytical equations for the statistical parameters
Publicado em: 2011
-
5. Modeling of statistical low-frequency noise of deep-submicrometer MOSFETs
The low—frequency noise (LF-noise) of deep-submicrometer MOSFETs is experimentally studied with special emphasis on yield relevant parameter scattering. A novel modeling approach is developed which includes detailed consideration of statistical effects. The model is based on device physics parameters which cause statistical variations in LF-noise behavior
Publicado em: 2011
-
6. Desenvolvimento de sistemas e medida de ruído de alta e baixa frequência em dispositivos semicondutores / System for high and low frequency noise measurements design and semiconductor devices characterization
Este trabalho teve como objetivo a montagem de um sistema de caracterização de ruído de alta e de baixa freqüência, utilizando equipamentos disponíveis no Centro de Componentes Semicondutores da Unicamp. Foi montado um sistema para a caracterização do ruído de baixa freqüência em dispositivos semicondutores e desenvolveu-se um método para a anál
IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia. Publicado em: 24/02/2010
-
7. Operação analógica de transistores de múltiplas portas em função da temperatura. / Analog operation of multiple gate transistors as a function of the temperature.
In this work it is presented an analysis of the analog operation of multiple gate transistors, evaluating the Early Voltage, the open-loop voltage gain, the transconductance over the drain current ratio (gm/IDS), the drain conductance and, especially, the harmonic distortion exhibited by these devices. Along the work, FinFETs, Gate-All-Around (GAA) devices w
Publicado em: 2010
-
8. Estudo da mobilidade em dispositivos SOI planares e de múltiplas portas. / Study of carriers mobility in planar and multiple gate SOI devices.
Este trabalho apresenta o estudo do comportamento da mobilidade de portadores em transistores SOI nMOS e pMOS avançados planares e de porta tripla através de simulações tridimensionais e resultados experimentais. Devido à sua estrutura física, os transistores de porta tripla apresentam duas mobilidades, uma referente ao canal de condução na porta sup
Publicado em: 2010
-
9. Chlorine plasma etching of polysilicon films for MEMS and MOS devices / Corrosão de filmes de silicio policristalino por plasma para aplicações em dispositivos MEMS e MOS utilizando misturas de gases com cloro
This work presents the results and the discussion about mechanisms of plasma etching of polysilicon and silicon films for applications in MEMS and MOS devices. The etching was performed in a conventional reactor of plasma etching, Applied Materials PE8300A model, in a RIE mode (Reactive Ion Etching). For application in MEMS, polysilicon etching with anisotro
Publicado em: 2009
-
10. Fabricação e caracterização de sensor de pixel ativo com tecnologia NMOS de porta metalica / Fabrication and characterization of active pixel sensors using metal gate NMOS technology
Active Pixel Sensors (APS) based on a simple nMOS technology with high aspect ratio may present good sensitivity to photodetection and offer a low cost option for image sensing circuits. This work presents the layout, fabrication and characterization of photodiodes, transistors and APSs built at the Center for Semiconductor Components (CCS). All the process
Publicado em: 2009
-
11. A modified lightly doped drain mosfet for very large scale integration
Reducing MOSFET dimensions while maintaining a constant supply voltage leads to higher electric fields inside the active regions of VLSI transistors. Operation of micron and submicron MOSFETs in the presence of high-field effects has required design innovations so that a constant supply voltage, acceptable punchthrough voltage, and long-term reliability are
Publicado em: 2009
-
12. Análise dos parâmetros analógicos do dispositivo SOI DTMOS. / Analog performance of dynamic threshold voltage SOI MOSFET.
This work presents the study of analog performance parameters of PDSOI (Partially-depleted) transistor in comparison with a Dynamic Threshold MOS transistor (DTMOS). The DTMOS is a partially-depleted device with dynamic threshold voltage. This variation of threshold voltage is obtained when the gate is connected to the silicon film (channel) of the PDSOI dev
Publicado em: 2009